5th Generation AMD EPYC (Turin) equipped "R8a" released, "M8a" also becomes available in Tokyo region

5th Generation AMD EPYC (Turin) equipped "R8a" released, "M8a" also becomes available in Tokyo region

Released EC2 instances R8a and M8a equipped with 5th generation AMD EPYC processors (Turin). With Zen 5 architecture adoption, performance is improved by up to 30%. M8a is also available in the Tokyo region.
2025.11.24

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On November 5, 2025, the memory-optimized instance family "R8a" was released.

Today, I'd like to share a cost comparison between the "R8a" instance launched in the Oregon region and the "M8a" instance which was released last month and is now available in the Tokyo region, compared to previous generation instances.

EC2 Dashboard

Launch Screen

In the Oregon region launch screen, I confirmed that the memory-optimized "r8a" is available for selection.

Instance Type_r8a

When launching EC2 instances in the Tokyo region, "m8a" is now available as an instance type selection.

Instance Type_m8a_Tokyo

Instance Type Information

I confirmed the following instance families equipped with 5th Generation AMD EPYC processors (Turin).
M8a has been available in the Tokyo region since November 12, 2025.

R8a (Memory Optimized) Available Regions

  • us-east-1 (Northern Virginia)
  • us-east-2 (Ohio)
  • us-west-2 (Oregon)

M8a (General Purpose) Available Regions

  • us-east-1 (Northern Virginia)
  • us-east-2 (Ohio)
  • us-west-2 (Oregon)
  • ap-northeast-1 (Tokyo) *Added on 11/12/2025

lscpu

I launched r8a.medium in the Oregon region and checked the CPU information using lscpu.
The CPU model is "AMD EPYC 9R45". M8a also uses the same processor.

sh-5.2$ lscpu
Architecture:            x86_64
  CPU op-mode(s):        32-bit, 64-bit
  Address sizes:         48 bits physical, 48 bits virtual
  Byte Order:            Little Endian
CPU(s):                  1
  On-line CPU(s) list:   0
Vendor ID:               AuthenticAMD
  Model name:            AMD EPYC 9R45
    CPU family:          26
    Model:               2
    Thread(s) per core:  1
    Core(s) per socket:  1
    Socket(s):           1
    Stepping:            1
    BogoMIPS:            5199.99
    Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall n
                         x mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf tsc
                         _known_freq pni pclmulqdq monitor ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c
                         rdrand hypervisor lahf_lm cr8_legacy abm sse4a misalignsse 3dnowprefetch topoext perfctr_core invpcid_singl
                         e ssbd perfmon_v2 ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 invpcid avx512f avx512dq rdseed adx
                         smap avx512ifma clflushopt clwb avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves avx512_bf1
                         6 clzero xsaveerptr rdpru wbnoinvd arat avx512vbmi pku ospke avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni
                         avx512_bitalg avx512_vpopcntdq rdpid flush_l1d
Virtualization features:
  Hypervisor vendor:     KVM
  Virtualization type:   full
Caches (sum of all):
  L1d:                   48 KiB (1 instance)
  L1i:                   32 KiB (1 instance)
  L2:                    1 MiB (1 instance)
  L3:                    4 MiB (1 instance)
NUMA:
  NUMA node(s):          1
  NUMA node0 CPU(s):     0

Notable Specification Changes

From the lscpu output, I identified the following technical changes:

  1. CPU Family 26 (Zen 5): CPU family: 26 indicates Zen 5 architecture (previous generation Genoa was Family 25).
  2. Increased L1d cache: L1d cache is 48 KiB, increased by 1.5 times from the previous generation (R7a/M7a) which had 32 KiB, expected to improve cache hit rates.
  3. AI inference instruction sets: Flags such as avx512_bf16 and avx512_vnni are present, enhancing CPU-based AI inference capabilities.

Cost Comparison

I compared the on-demand pricing of R8a and R7a Linux instances between the latest 8th generation (Turin) and 7th generation (Genoa).

r8a/r7a

Type vCPUs Memory (GiB) R8a (USD) R7a (USD)
medium 1 8 0.0799 0.0761
large 2 16 0.1598 0.1522
xlarge 4 32 0.3195 0.3043
2xlarge 8 64 0.6390 0.6086
4xlarge 16 128 1.2781 1.2172
8xlarge 32 256 2.5562 2.4344
12xlarge 48 384 3.8342 3.6516
16xlarge 64 512 5.1123 4.8688
24xlarge 96 768 7.6685 7.3032
48xlarge 192 1536 15.3370 14.6064
metal-48xl 192 1536 15.3370 14.6064

*Prices are on-demand hourly rates for Unix/Linux (USD) in the Oregon region

The on-demand pricing for the latest AMD-equipped instances is about 5% higher compared to the previous generation (R7a) with equivalent specifications.

While AMD instances typically maintained the same pricing across generations, R8a/M8a shows an increase in unit pricing.
However, according to official information, performance has improved by up to 30%, which could result in approximately 19% better cost efficiency if the same workload can be processed with fewer instances.

Summary

The "R8a" now available in the Oregon region and "M8a" available in the Tokyo region offer significantly enhanced processing capabilities with 4.5 GHz high-clock operation and increased L1 cache.

Finally, I'd like to mention important architectural differences compared to Intel-based instances.

https://dev.classmethod.jp/articles/memory-optimized-amazon-ec2-r8i-r8i-flex-instances/

Relationship between vCPU and Physical Cores
In same-generation instances with Intel processors (R7i, M7i, etc.), hyperthreading (HT) is typically enabled, providing 2 vCPU = 1 physical core (2 threads).
In contrast, for the R8a/M8a instances tested, as shown by the lscpu results (Thread(s) per core: 1), 1 vCPU maps directly to 1 physical core.

  • R7i.large (2 vCPU): Effectively 1 physical core (using HT)
  • R8a.large (2 vCPU): Effectively 2 physical cores (dedicated physical cores)

Therefore, for compute-intensive workloads where hyperthreading benefits are limited (prone to contention) or batch processes that need to fully utilize physical core performance, R8a/M8a instances are likely to deliver higher effective performance than their specifications might suggest.

While the unit price has increased by about 5%, understanding and leveraging this "physical core dedication" characteristic along with expanded memory bandwidth can lead to significant improvements in cost-performance.

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